1. Sources of interference
In the liquid crystal display module system test phase, anti-interference test is an important project, whether it is the use of professional instrument test or the whole machine for a long time running test. Interference is a common and very difficult problem in the whole system. When the system circuit is interfered with, the power line or signal line will produce a certain frequency, a certain amplitude of the interference wave. When the interference wave is applied to the interface line of the liquid crystal display module, it will inevitably bring an undesirable display effect to the display.
The LCD module is a pure input component for the whole system, or a passive component. The liquid crystal display module itself has no error correction function, that is, the liquid crystal display module can receive any signal that meets the operation timing relationship without the ability to judge whether it is right or wrong, right or wrong. Wrong signals and wrong data will produce wrong control instructions or wrong display patterns, resulting in wrong display effects.
The primary task of eliminating interference is to find the source of interference and the location of interference, and then use effective methods to eliminate,
Weaken or mask or remedy.
Ii. Anti-interference measures
This paper gives some constructive ideas to solve the common display problems of the LCD module in the anti-interference test of the whole system or in the operation of the copying machine, but the effective method needs to be explored and verified in the actual test and operation.
1. When the whole system is running or anti-interference test, the LCD display module has no display, and the contrast adjustment has no response
This phenomenon is because during the operation of the whole machine, the LCD module's power cord or/RESE7 signal line is subjected to electromagnetic interference, resulting in interference pulses, resulting in the LCD module being reset. The result of its reset is to initialize the module's internal registers and turn off the display. The recommended solutions are:
① If the interference is applied to the power line, it is recommended that a regulator capacitor (10μF) and a filter capacitor (0.1μF or 0.01μF) be installed between the VDD and VSS of the power line closest to the LCD module.
② If the interference is applied to the/RESET signal line, it is recommended to install a filter capacitor between the/RESET signal line and the VSS closest to the LCD module, with a capacitance of 0.1μF or O.01μF.
The selection of the above capacitance value needs to be based on the effect of the actual test.
2. When the whole system is running or performing anti-interference test, the screen produces wrong characters or random points (data errors). Or the picture translation, upside down and other phenomena. Sometimes can not be recovered, can only be re-written in clear screen, and even need to be re-powered, initialize the register to recover.
This phenomenon is mostly due to interference applied to control signals such as/WR signal, / RD signal or E signal or/CS signal. Interference signals are easy to produce wrong waveforms on these signal lines, causing the register parameters to be modified by mistake, and the display unit to write data by mistake.
When the whole system is running, most programs only write data to the local display area, do not write operations to other addresses, or do not repeat Settings for some registers that are set only in the initialization, so the above phenomenon occurs.
Assuming that the interference signal is applied from space on the transmission line between the MPU and the LCD module, it is recommended that:
① Use magnetic ring or tin foil, copper thin transmission line shielding;
② Change the direction of the transmission line to avoid interference environment;
③ Shorten the length of the transmission line;
④ In the key signal line, parallel interface mode: add 100-300pf small capacitance to ground (VSS) in the order of first/WR(/ RD) signal or E signal, then/CS signal, then RS signal. Serial interface mode: Add 100 ~ 300pF small capacitance to ground (VSS) in the order of SCLK, then SDA, then RS\RESET.
